{"product_id":"layout-techniques-for-integrated-circuit-designers-9781630819101","title":"Layout Techniques for Integrated Circuit Designers","description":"\u003cp\u003e\u003c\/p\u003e\u003cblockquote\u003e\n\u003cbr\u003eThis book provides step-by-step guidance on the physical implementation of modern integrated circuits, covering manufacturing techniques, design rules, high-frequency devices, and layout analysis. It helps designers understand the inner workings of layout-related software tools and addresses complexities such as signal integrity, matching, IR drop, and parasitic impedance. \u003c\/blockquote\u003e\u003cp\u003e\u003cstrong\u003eFormat\u003c\/strong\u003e: Paperback\u003cbr\u003e\u003cstrong\u003eLength\u003c\/strong\u003e: 463 pages\u003cbr\u003e\u003cstrong\u003ePublication date\u003c\/strong\u003e: 31 August 2022\u003cbr\u003e\u003cstrong\u003ePublisher\u003c\/strong\u003e: Artech House\u003cbr\u003e\u003c\/p\u003e \u003cp\u003e\u003cbr\u003eThis comprehensive guide offers detailed step-by-step instructions on the physical implementation of modern integrated circuits, providing insights into their limitations and offering solutions. It explores current manufacturing techniques and their impact on design rules, enabling readers to construct common high-frequency devices like inductors, capacitors, and T-coils. Additionally, it offers strategies for managing high-speed routing on package levels and within on-chip applications. Numerous algorithms implemented in Python are provided to guide the construction of extraction, netlist comparison, and design rule checkers. The book also delves into complexities affecting circuit design, such as signal integrity, matching, IR drop, and parasitic impedance, offering time-saving approaches to address these issues directly. It provides detailed descriptions of software tools used to analyze layout databases, showcasing their capabilities in recognizing devices and assessing connectivity accurately. By shedding light on the inner workings of layout-related software tools, the book enhances understanding of advanced node physics, high-speed techniques in modern integrated technologies, and the intricacies of layout analysis. This invaluable resource is particularly useful for circuit designers transitioning schematic designs into layout databases, especially those involved in deep submicron designs, as well as layout designers seeking to deepen their knowledge of modern layout rules.\u003c\/p\u003e\u003cp\u003e\u003cbr\u003e\u003cstrong\u003eISBN-13\u003c\/strong\u003e: 9781630819101\u003c\/p\u003e","brand":"Shulph Ink","offers":[{"title":"Paperback","offer_id":43556638261498,"sku":"9781630819101","price":76.31,"currency_code":"GBP","in_stock":false}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0522\/4297\/2845\/products\/noImage_1_7aa7bcba-a412-47ae-a2a1-bbce7bf58dba.jpg?v=1662962059","url":"https:\/\/shulphink.com\/products\/layout-techniques-for-integrated-circuit-designers-9781630819101","provider":"Shulph Ink","version":"1.0","type":"link"}