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David M. Russinoff

Formal Verification of Floating-Point Hardware Design: A Mathematical Approach

Formal Verification of Floating-Point Hardware Design: A Mathematical Approach

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  • More about Formal Verification of Floating-Point Hardware Design: A Mathematical Approach


The book Formal Verification of Floating-Point Hardware Design, Second Edition, focuses on ensuring the correctness of floating-point hardware designs through mathematical methods. It presents a verification methodology based on a unified theory of register-transfer logic and floating-point arithmetic, applied to the formal verification of commercial floating-point units. The theory is extended to analyze algorithms and optimization techniques, and high-level specifications of arithmetic instructions are provided for formal verification. The methodology is illustrated through the verification of state-of-the-art commercial floating-point designs by Arm Holdings. The revised edition reflects evolving microarchitectures and design goals and includes new results.

Format: Hardback
Length: 436 pages
Publication date: 04 March 2022
Publisher: Springer Nature Switzerland AG


This groundbreaking book is the first to delve into the critical issue of ensuring the accuracy of floating-point hardware designs through mathematical methods. Formal Verification of Floating-Point Hardware Design, Second Edition, presents a comprehensive verification methodology rooted in a unified theory of register-transfer logic and floating-point arithmetic. This theory has been extensively developed and applied to formally verify commercial floating-point units over a span of more than two decades, during which the author held positions at various prominent microprocessor design companies.

The theory is extended to analyze various algorithms and optimization techniques commonly employed in the commercial implementation of elementary arithmetic operations. As a foundation for formal verification, high-level specifications of the fundamental arithmetic instructions of major industry-standard floating-point architectures are presented, encompassing all details related to handling exceptional conditions. The methodology is exemplified through the comprehensive verification of a diverse range of state-of-the-art commercial floating-point designs developed by Arm Holdings.

This revised edition reflects the evolving microarchitectures and increasing sophistication of Arm processors, as well as the diverse design goals of execution speed, hardware area requirements, and power consumption. Numerous new results have been added to Parts I–III (Register-Transfer Logic, Floating-Point Arithmetic, and Implementation of Elementary Operations), expanding the theory and describing innovative techniques. These results were derived as necessary during the verification of the new RTL designs outlined in Part V.

By leveraging this comprehensive verification approach, Formal Verification of Floating-Point Hardware Design, Second Edition, plays a pivotal role in advancing the field of floating-point hardware design assurance. It serves as a valuable resource for researchers, engineers, and practitioners involved in the development and verification of floating-point systems, helping to ensure the reliability, correctness, and security of these critical components in modern computing.

Weight: 857g
Dimension: 235 x 155 (mm)
ISBN-13: 9783030871802
Edition number: 2nd ed. 2022

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